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Ice Ecc bugs - CPU usage not full

 
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pennyforthought



Joined: 05 Mar 2017
Posts: 4

PostPosted: Sun Mar 05, 2017 3:54 am    Post subject: Ice Ecc bugs - CPU usage not full Reply with quote

Without setting options to 50% CPU Usage, my cpu usage is only at 50% ~ 60%.
When i set the options to 50% CPU usage, it drops down to 23%.
And also, i notice that it is using around 4 cores.
Please advice... I am using Ice-Ecc v.2.7.

My Computer spec are the following:
CPU: FX 8350
Ram: 16GB
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ICE Graphics
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Joined: 31 Mar 2003
Posts: 430

PostPosted: Sun Mar 05, 2017 8:21 am    Post subject: Re: Ice Ecc bugs - CPU usage not full Reply with quote

This is not bug. There are multiple tasks witch need to do simultaneously. Some of them almost do not use CPU. For example, it's a file operations. Sometimes, ICE ECC calculate codes faster than read data files from HDD. In this is situation CPU utilization will be low.
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pennyforthought



Joined: 05 Mar 2017
Posts: 4

PostPosted: Mon Mar 06, 2017 12:22 pm    Post subject: Reply with quote

Even with SSD? Shocked
What the factors that is usually the bottomneck the software?
PS. I am a newbie in this.. Confused
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ICE Graphics
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Joined: 31 Mar 2003
Posts: 430

PostPosted: Tue Mar 07, 2017 9:01 am    Post subject: Reply with quote

pennyforthought wrote:
Even with SSD?

HDD was selected as the most simple example. Really much more complicated.

pennyforthought wrote:
What the factors that is usually the bottomneck the software?

There is not bottomneck in software. I can easy make test, with high percent redundancy in ICE ECC, then will be almost 100% CPU utilization for 4 cpu cores.

It's pure hardware bottomneck. The second bottomneck after HDD is RAM. A mean not only simple bandwidth, but also bandwidth linked with cache coherence.

pennyforthought wrote:
PS. I am a newbie in this.. Confused

I studied of creating effective multi-processor kernel. So I can safely say. It's not you newbie in this question. Very few of those who understand how a real multiprocessor system works. One simple phrase "cache coherence" for multiple CPU makes this question very difficult to understand.
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